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DISCRETE SEMICONDUCTORS
DATA SHEET
andbook, halfpage
MBD128
BF1206 Dual N-channel dual-gate MOS-FET
Product specification 2003 Nov 17
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
FEATURES * Two low noise gain controlled amplifiers in a single package * Superior cross-modulation performance during AGC * High forward transfer admittance * High forward transfer admittance to input capacitance ratio. APPLICATIONS * Gain controlled low noise amplifiers for VHF and UHF applications with 5 V supply voltage, such as digital and analog television tuners. DESCRIPTION The BF1206 is a combination of two different dual gate MOS-FET amplifiers with shared source and gate 2 leads. The source and substrate are interconnected. Internal bias circuits enable DC stabilization and a very good cross-modulation performance during AGC. Integrated diodes between the gates and source protect against excessive input voltage surges. The transistor is encapsulated in SOT363 micro-miniature plastic package.
AMP a
BF1206
PINNING - SOT363 PIN 1 2 3 4 5 6 drain (b) source gate 1 (b) gate 1 (a) gate 2 drain (a) DESCRIPTION
handbook, halfpage
d (a) 5 4
g2
g1 (a)
6
AMP b
1
2 Top view
3 d (b)
MAM480
s
g1 (b)
Marking code: L6-.
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT - - amp. a: ID = 18 mA amp. b: ID = 12 mA Cig1-s Crss Xmod input capacitance at gate 1 reverse transfer capacitance cross-modulation amp. a: ID = 18 mA; f = 1 MHz amp. b: ID = 12 mA; f = 1 MHz f = 1 MHz amp. a: input level for k = 1% at 40 dB AGC amp. b: input level for k = 1% at 40 dB AGC NF noise figure amp. a: f = 400 MHz; ID = 18 mA amp. b: f = 800 MHz; ID = 12 mA amp. a: f = 11 MHz; ID = 18 mA amp. b: f = 11 MHz; ID = 12 mA 2003 Nov 17 2 33 29 - - - 102 100 - - - - - - 38 34 2.4 1.7 15 105 103 1.3 1.4 3 3.5
Per MOS-FET; unless otherwise specified VDS ID yfs drain-source voltage drain current (DC) forward transfer admittance 6 30 48 44 2.9 2.2 - - - 1.9 2.0 - - V mA mS mS pF pF fF dBV dBV dB dB dB dB
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
BF1206
CAUTION This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME BF1206 - DESCRIPTION plastic surface mounted package; 6 leads VERSION SOT363
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS - - - - Ts 107 C; note 1 - -65 - MIN. MAX. UNIT
Per MOS-FET; unless otherwise specified VDS ID IG1 IG2 Ptot Tstg Tj Note 1. Ts is the temperature at the soldering point of the source lead. THERMAL CHARACTERISTICS SYMBOL Rth j-s PARAMETER thermal resistance from junction to soldering point VALUE 240 UNIT K/W drain-source voltage drain current (DC) gate 1 current gate 2 current total power dissipation storage temperature junction temperature 6 30 10 10 180 +150 150 V mA mA mA mW C C
2003 Nov 17
3
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
BF1206
handbook, halfpage
200
MLE257
Ptot (mW) 150
100
50
0 0 50 100 150 Ts (C) 200
Fig.2 Power derating curve.
STATIC CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL PARAMETER CONDITIONS VG1-S = VG2-S = 0; ID = 10 A VGS = VDS = 0; IG1-S = 10 mA VGS = VDS = 0; IG2-S = 10 mA VG2-S = VDS = 0; IS-G1 = 10 mA VG1-S = VDS = 0; IS-G2 = 10 mA VDS = 5 V; VG2-S = 4 V; ID = 100 A VDS = 5 V; VG1-S = 5 V; ID = 100 A amp. a: VG2-S = 4 V; VDS = 5 V; RG = 91 k; note 1 MIN. MAX. - 10 10 1.5 1.5 1 1 23 17 50 20 UNIT
Per MOS-FET unless otherwise specified V(BR)DSS V(BR)G1-SS V(BR)G2-SS V(F)S-G1 V(F)S-G2 VG1-S(th) VG2-S(th) IDSX drain-source breakdown voltage gate-source breakdown voltage gate-source breakdown voltage forward source-gate voltage forward source-gate voltage gate-source threshold voltage gate-source threshold voltage drain-source current 6 6 6 0.5 0.5 0.3 0.35 14 V V V V V V V mA mA nA nA
amp. b: 9 VG2-S = 4 V; VDS = 5 V; RG = 150 k; note 1 IG1-S IG2-S Note 1. RG1 connects gate 1 to VGG = 5 V. gate cut-off current gate cut-off current VG1-S = 5 V; VG2-S = VDS = 0 VG2-S = 5 V; VG1-S = VDS = 0 - -
2003 Nov 17
4
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
DYNAMIC CHARACTERISTICS AMPLIFIER a Common source; Tamb = 25 C; VG2-S = 4 V; VDS = 5 V; ID = 18 mA; unless otherwise specified. SYMBOL yfs Cig1-ss Cig2-ss Coss Crss NF PARAMETER forward transfer admittance input capacitance at gate 1 input capacitance at gate 2 output capacitance noise figure f = 1 MHz f = 1 MHz f = 1 MHz f = 11 MHz; GS = 20 mS; BS = 0 f = 400 MHz; YS = YS opt f = 800 MHz; YS = YS opt Gtr power gain f = 200 MHz; GS = 2 mS; BS = BS opt; GL = 0.5 mS; BL = BL opt; note 1 f = 400 MHz; GS = 2 mS; BS = BS opt; GL = 1 mS; BL = BL opt; note 1 f = 800 MHz; GS = 3.3 mS; BS = BS opt; GL = 1 mS; BL = BL opt; note 1 Xmod cross-modulation input level for k = 1%; fw = 50 MHz; funw = 60 MHz; note 2 at 0 dB AGC at 10 dB AGC at 40 dB AGC Notes 1. Calculated from measured s-parameters. 2. Measured in Fig.35 test circuit. 90 - 102 - 92 105 - - - CONDITIONS pulsed; Tj = 25 C MIN. 33 - - - - - - - - - - TYP. 38 2.4 3.2 1.1 15 3 1.3 1.6 35 30 23
BF1206
MAX. 48 2.9 - - 30 - 1.9 2.2 - - -
UNIT mS pF pF pF fF dB dB dB dB dB dB
reverse transfer capacitance f = 1 MHz
dBV dBV dBV
2003 Nov 17
5
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
GRAPHS FOR AMPLIFIER a
BF1206
handbook, halfpage
30
MLE258
(1) (2) (3) (4) (5)
handbook, halfpage
32
MLE259
ID (mA) 20
ID (mA) 24
(1)
(2) (3) (4) (5)
(6)
16
10
(7)
(6)
8
(7)
0 0 0.5 1 1.5 VG1-S (V) 2
0 0 2 4 VDS (V) 6
VDS = 5 V; Tj = 25 C. (1) (2) (3) (4) VG2-S = 4 V. VG2-S = 3.5 V. VG2-S = 3 V. VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V.
VG2-S = 4 V; Tj = 25 C. (1) VG1-S = 1.5 V. (2) VG1-S = 1.4 V. (3) VG1-S = 1.3 V. (4) VG1-S = 1.2 V. (5) VG1-S = 1.1 V. (6) VG1-S = 1 V. (7) VG1-S = 0.9 V.
Fig.3
Transfer characteristics; typical values; amplifier a.
Fig.4
Output characteristics; typical values; amplifier a.
2003 Nov 17
6
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
BF1206
handbook, halfpage
100 IG1
MLE260
(1)
(2)
handbook, halfpage
50
MLE261
(A) 80
(3) (4)
yfs (mS)
(3)
(2)
40
(1)
(4)
60
(5)
30
(5)
40
20
(6)
(6)
20
(7)
1
(7)
0 0 0.5 1 1.5 2 VG1-S (V)
0 0 10 20 ID(mA) 30
VDS = 5 V; Tj = 25 C. (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V.
VDS = 5 V; Tj = 25 C. (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V.
Fig.5
Gate 1 current as a function of gate 1 voltage; typical values; amplifier a.
Fig.6
Forward transfer admittance as a function of drain current; typical values; amplifier a.
handbook, halfpage
24
MLE262
handbook, halfpage
20
MLE263
ID (mA) 16
ID (mA) 16
12
8 8 4
0 0 10 20 30 40 50 IG1 (A)
0 0 1 2 3 4 VGG (V) 5
VDS = 5 V; VG2-S = 4 V; Tj = 25 C.
VDS = 5 V; VG2-S = 4 V; Tj = 25 C. RG1 = 91 k (connected to VGG); see Fig.35.
Fig.7
Drain current as a function of gate 1 current; typical values; amplifier a.
Fig.8
Drain current as a function of gate 1 supply voltage (VGG); typical values; amplifier a.
2003 Nov 17
7
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
BF1206
handbook, halfpage
40 ID
MLE288
handbook, halfpage
(1) (2)
20
MLE292
(mA) 32
ID (mA) 16
(1) (2) (3) (4)
24
(3) (4) (5) (6) (7)
12
(5)
16
8
8
4
0 0 2 3 6 VGG = VDS (V) 8
0 0 2 4 VG2-S(V) 6
VG2-S = 4 V; Tj = 25 C; RG1 = 150 k (connected to VGG); see Fig.35. (1) (2) (3) (4) RG1 = 56 k. RG1 = 68 k. RG1 = 82 k. RG1 = 91 k. (5) RG1 = 100 k. (6) RG1 = 120 k. (7) RG1 = 150 k. VDS = 5 V; Tj = 25 C; RG1 = 91 k (connected to VGG); see Fig.35. (1) VGG = 5 V. (2) VGG = 4.5 V. (3) VGG = 4 V. (4) VGG = 3.5 V. (5) VGG = 3 V.
Fig.9
Drain current as a function of gate 1 (VGG) and drain supply voltage; typical values; amplifier a.
Fig.10 Drain current as a function of gate 2 voltage; typical values; amplifier a.
2003 Nov 17
8
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
BF1206
handbook, halfpage
50
MLE264
IG1 (A)
handbook, halfpage
120
MLE266
40
(1) (2)
Vunw (dBV) 110
30
(3) (4) (5)
100
20
90 1
0 0 2 4 VG2-S(V) 6
80 0 10 20 30 40 50 gain reduction (dB)
VDS 5 V; Tj = 25 C. RG1 = 91 k (connected to VGG); see Fig.35. (1) VGG = 5 V. (2) VGG = 4.5 V. (3) VGG = 4 V. (4) VGG = 3.5 V. (5) VGG = 3 V. VDS = 5 V; VGG = 5 V; RG1 = 91 k; f = 50 MHz; f unw = 60 MHz; Tamb = 25 C; see Fig.35.
Fig.11 Gate 1 current as a function of gate 2 voltage; typical values; amplifier a.
Fig.12 Unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values; amplifier a.
handbook, halfpage gain
0
MLE265
handbook, halfpage
24
MLE267
reduction (dB) -10
ID (mA) 16
-20
-30 8 -40
-50
0 0 1 2 3 VAGC (V) 4 0 10 20 30 40 50 gain reduction (dB)
VDS = 5 V; VGG = 5 V; RG1 = 91 k; f = 50 MHz; Tamb = 25 C; see Fig.35.
VDS = 5 V; VGG = 5 V; RG1 = 91 k; f = 50 MHz; Tamb = 25 C; see Fig.35.
Fig.13 Typical gain reduction as a function of AGC voltage; typical values; amplifier a.
Fig.14 Drain current as a function of gain reduction; typical values; amplifier a.
2003 Nov 17
9
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
BF1206
102 handbook, halfpage Yis (mS) 10
MLE268
103 handbook, halfpage yrs (S) 102 rs
MLE269
-103 rs (deg) -102
bis yrs 1 10 -10
gis 10-1 10 1 10 -1 103 f (MHz)
102 f (MHz)
103
102
VDS = 5 V; VG2 = 4 V; ID = 18 mA; Tamb = 25 C. VDS = 5 V; VG2 = 4 V; ID = 18 mA; Tamb = 25 C.
Fig.15 Input admittance as a function of frequency; typical values; amplifier a.
Fig.16 Reverse transfer admittance and phase as a function of frequency; typical values; amplifier a.
102 handbook, halfpage yfs
MLE270
-102 fs (deg)
handbook, halfpage
10
MLE271
yfs (mS)
Yos (mS) bos 1
10
-fs
-10
10-1 gos
1 10
102
f (MHz)
-1 103
10-2 10
102
f (MHz)
103
VDS = 5 V; VG2 = 4 V; ID = 18 mA; Tamb = 25 C. VDS = 5 V; VG2 = 4 V; ID = 18 mA; Tamb = 25 C.
Fig.17 Forward transfer admittance and phase as a function of frequency; typical values; amplifier a.
Fig.18 Output admittance as a function of frequency; typical values; amplifier a.
2003 Nov 17
10
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
Amplifier a scattering parameters VDS = 5 V; VG2-S = 4 V; ID = 18 mA; Tamb = 25 C f (MHz) 50 100 200 300 400 500 600 700 800 900 1000 s11 MAGNITUDE (ratio) 0.988 0.984 0.971 0.951 0.926 0.896 0.865 0.832 0.797 0.769 0.732 ANGLE (deg) -4.62 -9.23 -18.33 -27.32 -36.04 -44.50 -52.63 -60.47 -67.66 -75.01 -81.73 s21 MAGNITUDE (ratio) 3.72 3.71 3.66 3.58 3.47 3.36 3.23 3.09 2.91 2.83 2.67 ANGLE (deg) 174.72 169.42 159.05 148.77 138.74 129.05 119.67 110.43 101.40 93.09 84.05 s12 MAGNITUDE (ratio) 0.0008 0.0015 0.0029 0.0038 0.0044 0.0046 0.0043 0.0038 0.0028 0.0051 0.0071 ANGLE (deg) 86.73 84.39 79.96 76.62 74.42 74.84 79.73 92.63 118.47 146.61 159.78
BF1206
s22 MAGNITUDE (ratio) 0.991 0.989 0.986 0.980 0.973 0.965 0.958 0.951 0.937 0.940 0.937 ANGLE (deg) -2.07 -4.16 -8.24 -12.32 -16.33 -20.25 -24.20 -28.14 -32.14 -35.76 -39.86
Noise data VDS = 5 V; VG2-S = 4 V; ID = 18 mA; Tamb = 25 C f (MHz) 400 800 Fmin (dB) 1.3 1.6 opt (ratio) 0.618 0.593 (deg) 22.7 44.1 Rn () 26.7 29.7
2003 Nov 17
11
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
DYNAMIC CHARACTERISTICS AMPLIFIER b Common source; Tamb = 25 C; VG2-S = 4 V; VDS = 5 V; ID = 12 mA; unless otherwise specified. SYMBOL yfs Cig1-ss Cig2-ss Coss Crss F PARAMETER forward transfer admittance input capacitance at gate 1 input capacitance at gate 2 output capacitance noise figure f = 1 MHz f = 1 MHz f = 1 MHz f = 11 MHz; GS = 20 mS; BS = 0 f = 400 MHz; YS = YS opt f = 800 MHz; YS = YS opt Gtr power gain f = 200 MHz; GS = 2 mS; BS = BS opt; GL = 0.5 mS; BL = BL opt; note 1 f = 400 MHz; GS = 2 mS; BS = BS opt; GL = 1 mS; BL = BL opt; note 1 f = 800 MHz; GS = 3.3 mS; BS = BS opt; GL = 1 mS; BL = BL opt; note 1 Xmod cross-modulation input level for k = 1%; fw = 50 MHz; funw = 60 MHz; note 2 at 0 dB AGC at 10 dB AGC at 40 dB AGC Notes 1. Calculated from measured s-parameters. 2. Measured in Fig.35 test circuit. 90 - 100 - 90 103 - - - CONDITIONS pulsed; Tj = 25 C MIN. 29 - - - - - - - - - - TYP. 34 1.7 4.2 0.85 15 3.5 1.3 1.4 35 31 27
BF1206
MAX. 44 2.2 - - 30 - 1.9 2 - - -
UNIT mS pF pF pF fF dB dB dB dB dB dB
reverse transfer capacitance f = 1 MHz
dBV dBV dBV
2003 Nov 17
12
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
GRAPHS FOR AMPLIFIER b
BF1206
handbook, halfpage
30
MLE272
(1) (2) (3) (5) (4)
handbook, halfpage
32
MLE273
ID (mA) 20
ID (mA) 24
(1) (2) (3)
(6)
16
(4)
10
(7)
(5)
8
(6) (7)
0 0 0.5 1 1.5 VG1-S (V) 2
0 0 2 4 VDS (V) 6
VDS = 5 V; Tj = 25 C. (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V.
VG2-S = 4 V; Tj = 25 C. (1) VG1-S = 1.5 V. (2) VG1-S = 1.4 V. (3) VG1-S = 1.3 V. (4) VG1-S = 1.2 V. (5) VG1-S = 1.1 V. (6) VG1-S = 1 V. (7) VG1-S = 0.9 V.
Fig.19 Transfer characteristics; typical values; amplifier b.
Fig.20 Output characteristics; typical values; amplifier b.
2003 Nov 17
13
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
BF1206
handbook, halfpage
100 IG1
MLE274
(1)
(2)
handbook, halfpage
50
MLE275
(A) 80
(3)
yfs (mS)
(2)
(1) (3)
40
60
(4)
(4)
30
(5)
(5)
40
(6)
20
(6)
20
(7)
10
(7)
0 0 0.5 1 1.5 2 VG1-S (V)
0 0 10 20 ID(mA) 30
VDS = 5 V; Tj = 25 C. (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V.
VDS = 5 V; Tj = 25 C. (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V.
Fig.21 Gate 1 current as a function of gate 1 voltage; typical values; amplifier b.
Fig.22 Forward transfer admittance as a function of drain current; typical values; amplifier b.
handbook, halfpage
24
MLE276
handbook, halfpage
12
MLE277
ID (mA) 16
ID (mA) 8
8
4
0 0 10 20 30 40 50 IG1 (A)
0 0 1 2 3 4 VGG (V) 5
VDS = 5 V; VG2-S = 4 V; Tj = 25 C.
VDS = 5 V; VG2-S = 4 V; Tj = 25 C. RG1 = 150 k (connected to VGG); see Fig.35.
Fig.23 Drain current as a function of gate 1 current; typical values; amplifier b.
Fig.24 Drain current as a function of gate 1 supply voltage (VGG); typical values; amplifier b.
2003 Nov 17
14
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
BF1206
handbook, halfpage
24
MLE278
handbook, halfpage
(1) (2) (3) (4) (5) (6) (7) (5)
16
MLE279
ID (mA) 16
ID (mA) 12
(1) (2) (3) (4)
8
8 4
0 0 2 4 6 VGG = VDS (V) 8
0 0 2 4 VG2-S (V) 6
VG2-S = 4 V; Tj = 25 C. RG1 = 150 k (connected to VGG); see Fig.35. (1) RG1 = 270 k. (2) RG1 = 220 k. (3) RG1 = 180 k. (4) RG1 = 150 k. (5) RG1 = 120 k. (6) RG1 = 100 k. (7) RG1 = 82 k. VDS = 5 V; Tj = 25 C. RG1 = 150 k (connected to VGG); see Fig.35. (1) VGG = 5 V. (2) VGG = 4.5 V. (3) VGG = 4 V. (4) VGG = 3.5 V. (5) VGG = 3 V.
Fig.25 Drain current as a function of gate 1 (VGG) and drain supply voltage; typical values; amplifier b.
Fig.26 Drain current as a function of gate 2 voltage; typical values; amplifier b.
2003 Nov 17
15
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
BF1206
handbook, halfpage
30
MLE280
handbook, halfpage
(1) (2)
120
MLE282
IG1 (A) 20
Vunw (dBV) 110
(3) (4)
100
(5)
10 90
0 0 2 4 VG2-S (V) 6
80 0 10 20 30 40 50 gain reduction (dB)
VDS 5 V; Tj = 25 C. RG1 = 150 k (connected to VGG); see Fig.35. (1) VGG = 5 V. (2) VGG = 4.5 V. (3) VGG = 4 V. (4) VGG = 3.5 V. (5) VGG = 3 V. VDS = 5 V; VGG = 5 V; RG1 = 150 k; f = 50 MHz; f unw = 60 MHz; Tamb = 25 C; see Fig.35.
Fig.27 Gate 1 current as a function of gate 2 voltage; typical values; amplifier b.
Fig.28 Unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values; amplifier b.
handbook, halfpage gain
0
MLE281
handbook, halfpage
16
MLE283
reduction (dB) -10
ID (mA) 12
-20 8 -30 4 -40
-50
0 0 1 2 3 VAGC (V) 4 0 10 20 30 40 50 gain reduction (dB)
VDS = 5 V; VGG = 5 V; RG1 = 150 k; f = 50 MHz; Tamb = 25 C; see Fig.35.
VDS = 5 V; VGG = 5 V; RG1 = 150 k; f = 50 MHz; Tamb = 25 C; see Fig.35.
Fig.29 Typical gain reduction as a function of AGC voltage; typical values; amplifier b.
Fig.30 Drain current as a function of gain reduction; typical values; amplifier b.
2003 Nov 17
16
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
BF1206
102 handbook, halfpage Yis (mS) 10
MLE284
103 handbook, halfpage yrs (S) 102 rs
MLE285
-103 rs (deg) -102
bis 1 yrs 10 -10
gis 10-1
10-2 10
102
f (MHz)
103
1 10
102 f (MHz)
-1 103
VDS = 5 V; VG2 = 4 V; ID = 12 mA; Tamb = 25 C. VDS = 5 V; VG2 = 4 V; ID = 12 mA; Tamb = 25 C.
Fig.31 Input admittance as a function of frequency; typical values; amplifier b.
Fig.32 Reverse transfer admittance and phase as a function of frequency; typical values; amplifier b.
102 handbook, halfpage yfs
MLE286
-102 fs (deg)
102 handbook, halfpage Yos (mS) 10 bos
MLE287
yfs (mS)
10 -fs
-10 gos 1
1 10
102
f (MHz)
-1 103
10-1 10
102
f (MHz)
103
VDS = 5 V; VG2 = 4 V; ID = 12 mA; Tamb = 25 C.
Fig.33 Forward transfer admittance and phase as a function of frequency; typical values; amplifier b.
VDS = 5 V; VG2 = 4 V; ID = 12 mA; Tamb = 25 C.
Fig.34 Output admittance as a function of frequency; typical values; amplifier b.
2003 Nov 17
17
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
BF1206
handbook, full pagewidth
VAGC R1 10 k
C1 4.7 nF C3 4.7 nF
C2 RGEN 50 VI R2 50 4.7 nF RG1
DUT
2.2 H
C4 4.7 nF
L1
RL 50
VGG
VDS
MGS315
Fig.35 Cross-modulation test set-up (for one MOS-FET).
Amplifier b scattering parameters VDS = 5 V; VG2-S = 4 V; ID = 12 mA; Tamb = 25 C f (MHz) 50 100 200 300 400 500 600 700 800 900 1000 s11 MAGNITUDE (ratio) 0.991 0.989 0.982 0.973 0.961 0.947 0.933 0.919 0.905 0.890 0.881 ANGLE (deg) -3.43 -6.84 -13.61 -20.37 -27.05 -33.68 -40.17 -46.54 -52.86 -58.60 -64.34 s21 MAGNITUDE (ratio) 3.44 3.43 3.41 3.38 3.34 3.29 3.23 3.16 3.09 3.02 2.94 ANGLE (deg) 176.33 172.66 165.44 158.20 151.04 144.02 137.12 130.22 123.22 116.84 110.20 s12 MAGNITUDE (ratio) 0.0008 0.0015 0.0029 0.0041 0.0051 0.0058 0.0062 0.0063 0.0065 0.0055 0.0058 ANGLE (deg) 86.54 84.92 80.95 77.63 74.43 71.86 70.28 70.72 72.37 75.91 89.82 s22 MAGNITUDE (ratio) 0.988 0.987 0.985 0.982 0.978 0.973 0.969 0.965 0.960 0.958 0.958 ANGLE (deg) -1.69 -3.38 -6.72 -10.08 -13.46 -16.83 -20.25 -23.68 -27.22 -30.57 -34.14
Noise data VDS = 5 V; VG2-S = 4 V; ID = 12 mA; Tamb = 25 C f (MHz) 400 800 Fmin (dB) 1.3 1.4 opt (ratio) 0.648 0.604 (deg) 14.4 31.1 Rn () 28.8 27.9
2003 Nov 17
18
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
PACKAGE OUTLINE Plastic surface mounted package; 6 leads
BF1206
SOT363
D
B
E
A
X
y
HE
vMA
6
5
4
Q
pin 1 index
A
A1
1
e1 e
2
bp
3
wM B detail X Lp
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT363
REFERENCES IEC JEDEC EIAJ SC-88
EUROPEAN PROJECTION
ISSUE DATE 97-02-28
2003 Nov 17
19
Philips Semiconductors
Product specification
Dual N-channel dual-gate MOS-FET
DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION
BF1206
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data Qualification
III
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2003 Nov 17
20
Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R77 20p/01/pp21
Date of release: 2003
Nov 17
Document order number:
9397 750 12005

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